Hacking Official [Source Release] ReiNand CFW

  • Thread starter Thread starter Reisyukaku
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Like Kuroi said, that's not an AGB_FIRM title. Try something like the ambassador GBA games to see what we mean. :P
oh, then just play VC games in sysnand.. if its really a big deal i can take out the button trigger and make it a flag in a config file, but then there goes the convenience factor :T
 
Last edited by Reisyukaku,
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theres a hole in this theory somehow since i play yellow VC on emu just fine, haha. I dont know why it works for me it just does
but yellow dont work the same as gba games, try with red fire or emerald, they arent the same yellow dont even need agb patch
 
oh, then just play VC games in sysnand.. if its really a big deal i can take out the button trigger and make it a flag in a config file, but then there goes the convenience factor :T

Instead of a config file, you could read the CFG_BOOTENV register to see if it's 7 like Aurora suggested, then just force sysNAND if it is. The ideal solution would be making patches for AGB_FIRM to read/write from/to the emuNAND instead of sysNAND though, if that's even possible, then it wouldn't be an issue.
 
Last edited by daxtsu,
Instead of a config file, you could read the CFG_BOOTENV register to see if it's 7 like Aurora suggested, then just force sysNAND if it is. The ideal solution would be making patches for AGB_FIRM to read/write from/to the emuNAND instead of sysNAND though, if that's even possible, then it wouldn't be an issue.
>reading CFG_BOOTENV
yea, sounds easiest

>patching agb for emu
thats what i was thinking originally but that sounds painful af
 
Forcing a reboot into sysNAND after playing GBA like AuReiNand would be the best solution. Currently it is on the user to remember to hold start after exiting GBA games so ReiNand boots into sysNAND preserving the save.
 
Forcing a reboot into sysNAND after playing GBA like AuReiNand would be the best solution. Currently it is on the user to remember to hold start after exiting GBA games so ReiNand boots into sysNAND preserving the save.

The nice thing is, it's an easy fix.

Code:
if(((~*(unsigned *)0x10146000) & 0xFFF) == (1 << 3)) return; //Press start to override emunand

becomes something like this:

Code:
#define CFG_BOOTENV *(volatile uint32_t *)0x10010000
if(((~*(unsigned *)0x10146000) & 0xFFF) == (1 << 3) || CFG_BOOTENV == 0x7) return; //Press start to override emunand
 
Ok, just got home from my 3 hr differential equations lecture. My brain hurts. I'll see what i can get done tonight lol.

Free brain massages! Apply now! (If only.)

Edit: Also, you don't need a separate branch for o3ds necessarily, just do something like this (this obviously doesn't fix the offset differences with your thread and stuff):

Code:
//firm.c:
#define PDN_MPCORE_CFG     (*(u8*)0x10140FFC)
#define N3DS 1
#define O3DS 0
static u8 console = N3DS;

void loadFirm(void) {
// ...
if (PDN_MPCORE_CFG == 1)
       console = O3DS;
if (console == N3DS)
       arm9Loader(...);
}

// further on in...

void launchFirm(void) {
  // .. memcpys and such
  u32 entrypoint = (console == N3DS) ? 0x801B01C : (u32)firm->arm9Entry;
((void(*)())entryPoint)();
}

That register indicates the CPU core configuration, and if it's equal to 1 (i.e. only the first bit is set), then it's obviously an O3DS. The other bits indicate the other two cores I think, but basically, if it's not 1, then it must be an N3DS.
 
Last edited by daxtsu,
Free brain massages! Apply now! (If only.)

Edit: Also, you don't need a separate branch for o3ds necessarily, just do something like this (this obviously doesn't fix the offset differences with your thread and stuff):

Code:
//firm.c:
#define PDN_MPCORE_CFG     (*(u8*)0x10140FFC)
#define N3DS 1
#define O3DS 0
static u8 console = N3DS;

void loadFirm(void) {
// ...
if (PDN_MPCORE_CFG == 1)
       console = O3DS;
if (console == N3DS)
       arm9Loader(...);
}

// further on in...

void launchFirm(void) {
  // .. memcpys and such
  u32 entrypoint = (console == N3DS) ? 0x801B01C : (u32)firm->arm9Entry;
((void(*)())entryPoint)();
}

That register indicates the CPU core configuration, and if it's equal to 1 (i.e. only the first bit is set), then it's obviously an O3DS. The other bits indicate the other two cores I think, but basically, if it's not 1, then it must be an N3DS.
>All those conditionals
This triggers me, lol. But thanks, ill take it with a grain of salt :p
 

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