I am wondering about the NAND chip THGBM2G3P1FBAI8:
It is stated by 3Dbrew to be 1GB sized, but on the website of a decapping company it is told to be 2GB - refer https://chipworks.secure.force.com/...GBM2G3P1FBAI8&viewState=DetailView&cartID=&g=
So which size is correct? I would assume that the guys with detailed pictures of the internals would knows it better?!
I tried to find some specs about the chip, but I had no luck. Also I didn't find any shops to buy one. The spec can tell us how many pins are required - probably these are only 8 pins CLK, CMD, DAT0-3, VCC and GND. Perhaps only CMD is needed for switching but therefore the data lines needs to be open-drain. Or perhaps there is a separate chip-select...
Background is, that I still have the idea of connecting a second chip in parallel with a logic to switch between them, which would give us the ability to have two separate Firmware versions. But this can only be realized if that chip (or a compatible one) is available and additionally if we can cut the connections of the origin NAND and rewire them to the switching logic without desoldering the complete chip.
It is stated by 3Dbrew to be 1GB sized, but on the website of a decapping company it is told to be 2GB - refer https://chipworks.secure.force.com/...GBM2G3P1FBAI8&viewState=DetailView&cartID=&g=
So which size is correct? I would assume that the guys with detailed pictures of the internals would knows it better?!
I tried to find some specs about the chip, but I had no luck. Also I didn't find any shops to buy one. The spec can tell us how many pins are required - probably these are only 8 pins CLK, CMD, DAT0-3, VCC and GND. Perhaps only CMD is needed for switching but therefore the data lines needs to be open-drain. Or perhaps there is a separate chip-select...
Background is, that I still have the idea of connecting a second chip in parallel with a logic to switch between them, which would give us the ability to have two separate Firmware versions. But this can only be realized if that chip (or a compatible one) is available and additionally if we can cut the connections of the origin NAND and rewire them to the switching logic without desoldering the complete chip.