Errata: Upon further research I have discovered that I have mistakenly typed in false information in
this post, stating that the CELL PPE's DMIPS score was 10.240 and the Xenon's was 19.200 - this is not the case. The confusion was derrived from the attached
Wikipedia article. The scores have no source attached to them and upon some research turn out to be incorrect.
After reading a bit of IBM's
CELL documentation, I have gathered that the CELL performs up to
4 instruction fetches per cycle and issue up to
2 instructions per cycle, the latter information was likely used to calculate the DMIPS count for the Xenon
(3200 (MHz) * 2 (Instructions per Cycle) * 3 (Cores) = 19200) which is naturally false - this result does not directly translate to a Dhrystone score which is a benchmark. I have no idea where the 10.240 DMIPS value for the PS3's PPE came from, but that's completely irrelevant as it is also false.
The DMIPS results have since been corrected in the post - the PPE reached a 1879.63 DMIPS score sans SPE support and by extension the PPE-based Xenon containing 3 PPE-derrivative cores reaches around 5.639 DMIPS, these results are far more probable, the source is
Beyond3D and early CELL benchmarks.
I apologize for any inconvenience I may have caused as well as for the bump - I typed this message in
"good faith" so that future readers will not be confused by the incorrect score.
