There are other issues, pokemon gold shares RAM BANK between A000-BFFF (up to four in total), with RTC commands. BANK 0 is given a specialtreatment from MBC3 backwards (redirects to 0000-3FFF), while MBC5 creates a bank "0". latch clock signal (write only) exists only in MBC-3, so a patch to disable entirely clock is a must.
RAM BANKs on MBC-5 are either 64 (4 bytes),256(16 bytes) or 1024 bit (64 bytes) (must be chosen and addresses must fit game reserved buffers for fixed RAM BANKs values)
MBC-3 shares 2000-3FFF to set current ROM BANK number, by redirecting to indexed ROM BANK physical areas between 4000-7FFF, MBC-5 splits:
2000-2FFF for current RAM BANK (8 lowest bits), with the specified BANK 0 treatment described above.
3000-3FFF for current RAM BANK (high bit [9-15 highest bits?]) are saved here, probably because of larger virtual table lengths.
at least that's what I understood here:
http://gbdev.gg8.se/wiki/articles/Memory_Bank_Controllers
good luck.
RAM BANKs on MBC-5 are either 64 (4 bytes),256(16 bytes) or 1024 bit (64 bytes) (must be chosen and addresses must fit game reserved buffers for fixed RAM BANKs values)
MBC-3 shares 2000-3FFF to set current ROM BANK number, by redirecting to indexed ROM BANK physical areas between 4000-7FFF, MBC-5 splits:
2000-2FFF for current RAM BANK (8 lowest bits), with the specified BANK 0 treatment described above.
3000-3FFF for current RAM BANK (high bit [9-15 highest bits?]) are saved here, probably because of larger virtual table lengths.
at least that's what I understood here:
http://gbdev.gg8.se/wiki/articles/Memory_Bank_Controllers
good luck.