
What is the via?since you have been dig in too much so you might have damaged the via, you would need to open/grind up more space around (black) and expose the 2nd layer on the via to rebuild the contact to blue traces
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So do I have to expose that black area and then solder a wire on it to the blue trace?since you have been dig in too much so you might have damaged the via, you would need to open/grind up more space around (black) and expose the 2nd layer on the via to rebuild the contact to blue traces
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You dont have to if you are confident but no harm to give yourself extra roomSo do I have to expose that black area and then solder a wire on it to the blue trace?
But doing this will fix my switch correct?You dont have to if you are confident but no harm to give yourself extra room
Hi. I need help with this. I am getting error *== (short long long) on picofly. I have damaged the via. The line to the cpu is fine and I am getting 0.56v diode reading. Any idea where this via leads to so that I can connect a wire externally to complete the circuit?since you have been dig in too much so you might have damaged the via, you would need to open/grind up more space around (black) and expose the 2nd layer on the via to rebuild the contact to blue traces
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Ok sorry I just saw this. so the via goes to layer 4. That's impossible to link with my experience and equipment. Doesn't this line pop up anywhere else on the top or bottom layers?Via is the node/pad goes through different layers on the board at the end of data-line traces, like the CLK via/pad you ruined
CLK via(blue dot) actually goes from the 1st layer into layer4 and sits next to 47k ohm resistor ground pad, but it doesn't make sense to go that far to recover such easy pad by just enlarging some ground space from layer1 and layer2 around CLK pad.
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No, if you terminated the 1st layer CLK point right next to CPU, there is no other spot you could use since it goes from top 1st layer routing into 4th top layer, and then straight into bottom side eMMC pad underneathOk sorry I just saw this. so the via goes to layer 4. That's impossible to link with my experience and equipment. Doesn't this line pop up anywhere else on the top or bottom layers?
Got it working. There was no way I would try for the 4th layer. So I did as suggested in earlier post. Cleared the ground pad surrounding the via and exposed the via (used grinding pen). I soldered one wire on the line coming from cpu and another wire to the via. Both these wires i soldered to D point on the chip. Now it works. Can't believe I accomplished this without a microscope, took 30 minutes of my life thoughNo, if you terminated the 1st layer CLK point right next to CPU, there is no other spot you could use since it goes from top 1st layer routing into 4th top layer, and then straight into bottom side eMMC pad underneath


use kapton tape if you not prefer solder mask, since it is around the cpu metal shield, I do recommend make at least some insulation to keep this CLK point safeSolder mask is hard to remove and I could damage what's left of the track so.