Hacking Clk point is missing or damaged

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twerp48

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How can I repair this clk point? When I power it on the cpu warms up but the screen doesn't turn on
 

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since you have been dig in too much so you might have damaged the via, you would need to open/grind up more space around (black) and expose the 2nd layer on the via to rebuild the contact to blue traces

1744839527716.png
 
Via is the node/pad goes through different layers on the board at the end of data-line traces, like the CLK via/pad you ruined

CLK via(blue dot) actually goes from the 1st layer into layer4 and sits next to 47k ohm resistor ground pad, but it doesn't make sense to go that far to recover such easy pad by just enlarging some ground space from layer1 and layer2 around CLK pad.
1744841138630.png

Post automatically merged:

I don't want to disappoint you but usually when I see something like you did on the board, I would barely believe you are capable to recover such tiny trace or pad by yourself. Find an expert or sell this board to avoid further damage is your ultimate goal.
 
Last edited by jkyoho,
since you have been dig in too much so you might have damaged the via, you would need to open/grind up more space around (black) and expose the 2nd layer on the via to rebuild the contact to blue traces

View attachment 498468
Hi. I need help with this. I am getting error *== (short long long) on picofly. I have damaged the via. The line to the cpu is fine and I am getting 0.56v diode reading. Any idea where this via leads to so that I can connect a wire externally to complete the circuit?
Post automatically merged:

Via is the node/pad goes through different layers on the board at the end of data-line traces, like the CLK via/pad you ruined

CLK via(blue dot) actually goes from the 1st layer into layer4 and sits next to 47k ohm resistor ground pad, but it doesn't make sense to go that far to recover such easy pad by just enlarging some ground space from layer1 and layer2 around CLK pad.
View attachment 498471
Ok sorry I just saw this. so the via goes to layer 4. That's impossible to link with my experience and equipment. Doesn't this line pop up anywhere else on the top or bottom layers?
 
Last edited by jetuaime81,
Ok sorry I just saw this. so the via goes to layer 4. That's impossible to link with my experience and equipment. Doesn't this line pop up anywhere else on the top or bottom layers?
No, if you terminated the 1st layer CLK point right next to CPU, there is no other spot you could use since it goes from top 1st layer routing into 4th top layer, and then straight into bottom side eMMC pad underneath
 
No, if you terminated the 1st layer CLK point right next to CPU, there is no other spot you could use since it goes from top 1st layer routing into 4th top layer, and then straight into bottom side eMMC pad underneath
Got it working. There was no way I would try for the 4th layer. So I did as suggested in earlier post. Cleared the ground pad surrounding the via and exposed the via (used grinding pen). I soldered one wire on the line coming from cpu and another wire to the via. Both these wires i soldered to D point on the chip. Now it works. Can't believe I accomplished this without a microscope, took 30 minutes of my life though 😂

This area is very small, I didn't use solder mask to cover the soldering in case I had to work on it later. Would there be a problem like corrosion if I leave it exposed? Solder mask is hard to remove and I could damage what's left of the track so.
 
Last edited by jetuaime81,

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