Supercard CPLD config and reverse engineering

[davidgf]

Hey folks!
As some might have noticed, Im working on making the Supercard better.
In this endavour, among other things, I noticed that there's some potentially hidden things in the CPLD (unknown really), such as the fact that the A16 SRAM pin is actually connected to the CPLD. This could mean that it might be possible to access the full 128KB SRAM that the device ships, and thus make supercard suck less at running Pokemon games.
There might be more things hidden there, but we cannot know until we fully understand the CPLD config.

So with the help of @Klikks we are trying to understand that better. But so far we got lucky and one of our Supercards was not read-protected and so I could dump the JEDEC config (attached in this post).
Now I'm trying to reverse this thing (since this CPLD is "relatively" simple) using different sources of information. So far we are barely getting started. If you are an expert in FPGA/CPLD/PLA feel free to jump right in! All help is welcome! We might not find anything super exciting, but if we are able to fix a couple of bugs/quirks and improve this cart, it might be good enough already!

Have fun!

 

[OmDRetro]

And here I am waiting patiently for you to open source your kernel just so I can add in more filetype support.

Sounds great so far!

 

[SuperCardDeepFan]

How nice is all this I wish someone can make that possible to make this card better because I think in my own opinion it's one of the best ones out there cheap and it does the job save states, cheats, what else can I ask it's perfect in my opinion I do have an easy flash Omega and I use more my super card definitely love it more this card has something special on it especially on those four slots for safe state with the other ones doesn't have just one

 

[davidgf]

While this is still a work in progress, I am reversing the CPLD thanks to Ben Crist's knowledge and projects.
For context he reversed most ispMACH CPLDs here: https://github.com/bcrist/re4k

So far we did some work on getting the PCB and signals sorted out. It seems to match what we already know about the supercard SD. While on it I discovered a couple new things, for instance, how to use the full 128KB of SRAM. That probably means we can add support for Pokemon-like games to any new firmware, and perhaps even the official firmware patcher or so.

Stay tuned for more

 

[davidgf]

Hey there! Just thought I'd drop a few links for now, if someone is interested and for posterity.
We figured the SC has SRAM banking using the SC register bit 2. This bit is also used to enable writes to the SDRAM.
Can find it in the CPLD reversing repo, here a link to the (still WIP) CPLD report dump: https://html-preview.github.io/?url...et/gba-supercard-cpld/blob/master/report.html

So glad we figured this out after all!