Was this already discovered?
http://pastebin.com/7gT17Fpe
Sorry but not following this thread so much
You're close, that syntax looks right but the hex file you posted isn't even close, should look something like this (should cut off 0x100 ancast header like I did, the IV just fixes the first 4 opcodes at the very start of the data, so you'll want to load it in at 0xFFE00100)
I tried loading in kernel before but half the opcodes wouldn't disassemble but I just figured it out. I'm using IDA 6.6, this was my process.
Binary File, Processor type PowerPC big-endian [PPC] -> SET
Kernel options 1, turn off delete instructions with no xrefs (third down), turn on create function if xref ->code32 exists
Kernel options 2, turn on Coagulate data and perform full stack pointer analysis
Processor options, set TOC, SDA, and MMIO to 0xFFFFFFFF, turn on subi instructions, set Instruction set to PS (Paired Singles, !!!!) and then untick server.
Hit OK to go to next window, Diassembly memory organization, ROM start address and Loading address are 0xFFE00100 (if you cut off the 0x100 ancast header which helps a bunch), hit OK
Device name is ppc, hit OK, then TURN OFF Memory layout, I/O ports and Interrupts can stay on. If you do not turn off Memory layout it will not dissassemble half the instructions correctly :\
Should like this, then you can start cleaning up functions and data
(BTW I'm also interested in learning ARM too @ IOSU disassembly group, PPC is pretty easy to read now)